Processor core counts are skyrocketing these days, both on the consumer side and of course in the workstation sector. In regards to the latter, Intel last week announced the immediate availability of its Xeon E-2100 processors targeted at small and medium size businesses, and also a 48-core Cascade Lake CPU for burlier workloads. According to Intel’s own testing, the 48-core chip trounces AMD’s Epyc 7601 processor.
Let’s back up a moment. Intel is gearing up to launch a line of Cascade Lake-SP Xeon processors built on a 14-nanometer plus-plus (14nm++) manufacturing process, set to debut before the end of the year. Intel also announced that it plans to launch even higher performing Cascade Lake-AP processors during the first half of 2019, and they will be powerhouses compared to the current Xeon Scalable family, as well as AMD’s Epyc 7601.
That’s where the 48-core chip comes into play. It beats AMD’s 32-core/64-thread Epyc 7601 in core and thread counts, while we’ll have to wait and see how it stacks up in terms of clockspeeds and overall cache. In the meantime, Intel claims its upcoming slice of silicon tops AMD’s monstrous part with a 3.4x uplift in Linpack and a 1.3x uplift in Steam Triad. And compared to the Xeon Scalable 8180, the performance delta is 1.21x and 1.83x, respectively.
It’s fair to say that the average user is not familiar with any of those applications. In short, they represent a variety of high-performance computing (HPC) modeling and simulation tasks, from quantum chromodynamics to weather and atmosphere research and prediction. Heavy duty stuff, in other words, and of interest to the scientific community.
Of course, with Intel’s 48-core Cascade Lake-AP having more cores and threads than AMD’s Epyc 7601, we would naturally expect better performance in applications that can take full or at least partial advantage of the additional processing resources. So, this isn’t as much about the architecture as Intel may want to portray, as it is about core and thread counts. It’s also worth noting the fine print, and specifically that SMT is on with two threads per core in YASK and NAMD, and one thread per core in some others. Still other tests have SMT disabled, which in some cases could be a function of the test itself.
Nevertheless, these are impressive performance claims, if they hold true. The performance advantage could also be short lived—AMD recently showed off a 64-core/128-thread Epyc “Rome” processor based on its 7nm Zen 2 architecture.